#ifndef __GILBRALTAR_MEMORY_MAP__
#define __GILBRALTAR_MEMORY_MAP__

#ifndef __GILBRALTAR_MEMORY_MAP__
#error Do not include memory_map.h file directly!
#endif

#ifndef MEGABYTE
#define MEGABYTE 0x100000
#endif

#ifndef GIGABYTE
#define GIGABYTE 0x40000000UL
#endif

#define CORES 4                                // must be a power of 2
#define MEM_SIZE (512 * MEGABYTE)              // default size
#define GPU_MEM_SIZE (64 * MEGABYTE)           // set in config.txt
#define ARM_MEM_SIZE (MEM_SIZE - GPU_MEM_SIZE) // normally overwritten
#define PAGE_SIZE 0x10000LL                    // page size used by us
#define PAGE_SHIFT 16
#define EXCEPTION_STACK_SIZE 0x8000
#define PAGE_RESERVE (16 * MEGABYTE)

// Kernel
#define MEM_KERNEL_START 0x80000 // main code starts here
#define MEM_KERNEL_END (MEM_KERNEL_START + KERNEL_MAX_SIZE)
#define MEM_KERNEL_STACK (MEM_KERNEL_END + KERNEL_STACK_SIZE) // expands down

#define MEM_EXCEPTION_STACK                                                    \
  (MEM_KERNEL_STACK + KERNEL_STACK_SIZE * (CORES - 1) + EXCEPTION_STACK_SIZE)
#define MEM_EXCEPTION_STACK_END                                                \
  (MEM_EXCEPTION_STACK + EXCEPTION_STACK_SIZE * (CORES - 1))

// Coherent Memory Region (4 MB)
#define MEM_COHERENT_REGION                                                    \
  ((MEM_EXCEPTION_STACK_END + 2 * MEGABYTE) & ~(MEGABYTE - 1))

// Heap
#define MEM_HEAP_START (MEM_COHERENT_REGION + 4 * MEGABYTE)

// IRQ & FIC stacks
#define MEM_ABORT_STACK (MEM_KERNEL_STACK + KERNEL_STACK_SIZE * (CORES - 1))
#define MEM_IRQ_STACK (MEM_EXCEPTION_STACK_END + EXCEPTION_STACK_SIZE)
#define MEM_FIQ_STACK                                                          \
  (MEM_IRQ_STACK + EXCEPTION_STACK_SIZE * (CORES - 1) + EXCEPTION_STACK_SIZE)

// Page table
#define MEM_PAGE_TABLE1 (MEM_FIQ_STACK + EXCEPTION_STACK_SIZE * (CORES - 1))

#define PAGE_TABLE1_SIZE 0x4000
#define MEM_PAGE_TABLE1_END (MEM_PAGE_TABLE1 + PAGE_TABLE1_SIZE)

// I/O memory regions of RaspBerry Pi 5
#define MEM_IOMEM_AXI_START 0x1000000000UL // AXI peripherals
#define MEM_IOMEM_AXI_END 0x101fffffffUL
#define MEM_IOMEM_SOC_START 0x1060000000UL // SoC peripherals
#define MEM_IOMEM_SOC_END 0x107fffffffUL
#define MEM_IOMEM_PCIE_START 0x1f00000000UL // PCI Bus 0000:01
#define MEM_IOMEM_PCIE_END 0x1f1fffffffUL

#endif