35 lines
962 B
C
35 lines
962 B
C
#ifndef __GILBRALTAR_BCM__
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#define __GILBRALTAR_BCM__
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#define ARM_IO_BASE 0x107c000000UL
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// System timers
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#define ARM_SYSTIMER_BASE (ARM_IO_BASE + 0x3000)
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#define ARM_SYSTIMER_CS (ARM_SYSTIMER_BASE + 0x00)
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#define ARM_SYSTIMER_CLO (ARM_SYSTIMER_BASE + 0x04)
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#define ARM_SYSTIMER_CHI (ARM_SYSTIMER_BASE + 0x08)
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// Interrupt Controller
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#define ARM_IC_BASE (ARM_IO_BASE + 0xb000)
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#define ARM_IC_FIQ_CONTROL (ARM_IO_BASE + 0x20c)
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// General Purpose I/O #2
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#define ARM_GPIO2_BASE (ARM_IO_BASE + 0x1517c00)
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#define ARM_GPIO2_DATA0 (ARM_GPIO2_BASE + 0x04)
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#define ARM_GPIO2_IODIR0 (ARM_GPIO2_BASE + 0x08)
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// Power Manager
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#define ARM_PM_BASE (ARM_IO_BASE + 0x1200000)
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#define ARM_PM_RSTC (ARM_PM_BASE + 0x1c)
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#define ARM_PM_RSTS (ARM_PM_BASE + 0x20)
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#define ARM_PM_WDOG (ARM_PM_BASE + 0x24)
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#define ARM_PM_PADS0 (ARM_PM_BASE + 0x2c)
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#define ARM_PM_PADS1 (ARM_PM_BASE + 0x30)
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#define ARM_PM_PADS2 (ARM_PM_BASE + 0x34)
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#define ARM_PM_PASSWD (0x5a << 24)
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#endif
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