112 lines
3.5 KiB
C
112 lines
3.5 KiB
C
#ifndef __GILBRALTAR_TRANSITION_TABLE__
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#define __GILBRALTAR_TRANSITION_TABLE__
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#include <stddef.h>
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#include <stdint.h>
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#define ARMV8MMU_TABLE_ENTRIES 8192
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// index into MAIR_EL1 register
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#define ATTR_INDX_NORMAL 0
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#define ATTR_INDX_DEVICE 1
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#define ATTR_INDX_COHERENT 2
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// Level 2
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struct __attribute__((packed)) TARMV8MMU_LEVEL2_TABLE_DESCRIPTOR {
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uint64_t value11 : 2, // set to 3
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ignored1 : 14, // set to 0
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table_addr : 32, // table base [47:16]
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reserved0 : 4, // set to 0
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ignored2 : 7, // set to 0
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pxn_table : 1, // set to 0
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uxn_table : 1, // set to 0
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ap_table : 2,
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#define AP_TABLE_ALL_ACCESS 0
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ns_table : 1 // RES0, set to 0
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;
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};
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#define ARMV8MMUL2TABLEADDR(addr) (((addr) >> 16) & 0xffffffff)
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#define ARMV8MMUL2TABLEPTR(table) ((void *)((table) << 16))
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struct __attribute__((packed)) TARMV8MMU_LEVEL2_BLOCK_DESCRIPTOR {
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uint64_t value01 : 2, // set to 1
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// lower attributes : 10,
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attr_indx : 3, // [2:0], see MAIR_EL1
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ns : 1, // RES0, set to 0
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ap : 2, // [2:1]
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#define ATTR_IB_AP_RW_EL1 0
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#define ATTR_IB_AP_RW_ALL 1
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#define ATTR_IB_AP_RO_EL1 2
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#define ATTR_IB_AP_RO_ALL 3
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sh : 2, // [1:0]
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#define ATTR_IB_SH_NON_SHAREABLE 0
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#define ATTR_IB_SH_OUTER_SHAREABLE 2
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#define ATTR_IB_SH_INNER_SHAREABLE 3
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af : 1, // set to 1, will fault otherwise
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ng : 1, // set to 0
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reserved0_1 : 17, // set to 0
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output_addr : 19, // [47:29]
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reserved0_2 : 4, // set to 0
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// upper attributes : 12
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continuous : 1, // set to 0
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pxn : 1, // set to 0, 1 for device memory
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uxn : 1, // set to 1
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ignored : 9 // set to 0
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;
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};
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#define ARMV8MMU_LEVEL2_BLOCK_SIZE (512 * MEGABYTE)
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#define ARMV8MMUL2BLOCKADDR(addr) (((addr) >> 29) & 0x7ffff)
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#define ARMV8MMUL2BLOCKPTR(block) ((void *)((table) << 29))
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struct __attribute__((packed)) TARMV8MMU_LEVEL2_INVALID_DESCRIPTOR {
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uint64_t value0 : 1, // set to 0
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ignored : 63;
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};
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union __attribute__((packed)) TARMV8MMU_LEVEL2_DESCRIPTOR {
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struct TARMV8MMU_LEVEL2_TABLE_DESCRIPTOR table;
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struct TARMV8MMU_LEVEL2_BLOCK_DESCRIPTOR block;
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struct TARMV8MMU_LEVEL2_INVALID_DESCRIPTOR invalid;
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};
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// Level 3
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struct __attribute__((packed)) TARMV8MMU_LEVEL3_PAGE_DESCRIPTOR {
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uint64_t value11 : 2, // set to 3
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// lower attributes : 10,
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attr_indx : 3, // [2:0], see MAIR_EL1
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ns : 1, // RES0, set to 0
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ap : 2, // [2:1]
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sh : 2, // [1:0]
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af : 1, // set to 1, will fault otherwise
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ng : 1, // set to 0
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reserved0_1 : 4, // set to 0
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output_addr : 32, // [47:16]
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reserved0_2 : 4, // set to 0
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// upper attributes : 12
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continuous : 1, // set to 0
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pxn : 1, // set to 0, 1 for device memory
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uxn : 1, // set to 1
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ignored : 9 // set to 0
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;
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};
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#define ARMV8MMU_LEVEL3_PAGE_SIZE 0x10000
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#define ARMV8MMUL3PAGEADDR(addr) (((addr) >> 16) & 0xffffffff)
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#define ARMV8MMUL3PAGEPTR(page) ((void *)((page) << 16))
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struct __attribute__((packed)) TARMV8MMU_LEVEL3_INVALID_DESCRIPTOR {
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uint64_t value0 : 1, // set to 0
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ignored : 63;
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};
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union __attribute__((packed)) TARMV8MMU_LEVEL3_DESCRIPTOR {
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struct TARMV8MMU_LEVEL3_PAGE_DESCRIPTOR page;
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struct TARMV8MMU_LEVEL3_INVALID_DESCRIPTOR invalid;
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};
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void gilbraltar_translation_table_init(size_t);
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uintptr_t gilbraltar_translation_table_base(void);
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#endif
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